1. Technical Field
The present disclosure relates to an array substrate, and more particularly, to an array substrate having an integrated gate driver and a method of fabricating the same.
2. Discussion of the Related Art
Recently, liquid crystal display (LCD) devices have been in the spotlight as a next generation display device because the LCD device has high value added due to its low-power consumption and good portability.
The LCD device includes an array substrate where a plurality of thin film transistors (TFTs) are disposed, a color filter substrate and a liquid crystal layer between the array substrate and the color filter substrate. The LCD device displays an image using difference in refractive index according to optical anisotropy of the liquid crystal layer.
In recent years, an active-matrix LCD (AM-LCD) device where TFTs and pixel electrodes are arranged in matrix shapes has attracted much attention because of its high resolution and its high capability of embodying moving images.
Since amorphous silicon (a-Si) is formed through a low temperature process, an insulating substrate of a low cost may be adopted for amorphous silicon. As a result, the TFTs of the array substrate may be formed using amorphous silicon.
The LCD device includes a liquid crystal panel displaying an image, a backlight unit supplying a light to the liquid crystal panel and a driving unit supplying signals and power to the liquid crystal panel. The driving unit includes a printed circuit board (PCB). The PCB is classified into a gate PCB connected to a gate line of the liquid crystal panel and a data PCB connected to a data line of the liquid crystal panel. The gate PCB and the data PCB may be attached to a gate pad and a data pad, respectively, on the liquid crystal panel through a tape carrier package (TCP). The gate pad connected to the gate line is formed on an edge portion of the liquid crystal panel and the data pad connected to the data line is formed on another edge portion of the liquid crystal panel.
Since the driving unit includes the gate PCB and the data PCB attached to the gate pad and the data pad, respectively, a volume and a weight of the LCD device increase. To lessen the above drawbacks, a gate in panel (GIP) type LCD device where a gate driver is formed in the liquid crystal panel and a single PCB is attached to the liquid crystal panel has been suggested.
In the GIP type LCD device, the gate driver is formed together with the array substrate. In addition, the gate driver integrated in the array substrate includes a shift register and the shift register includes a plurality of stages connected in cascade.
FIG. 1 is a view showing an array substrate for a gate in panel type liquid crystal display device according to the related art.
In FIG. 1, an array substrate for a gate in panel (GIP) type liquid crystal display (LCD) device includes an active area AA and a gate circuit area GCA. A plurality of gate lines GL1 to GLn and a plurality of data lines DL1 to DLm are formed in the active area AA, and a gate driver is formed in the gate circuit area GCA. The gate driver includes a shift register and the shift register includes a plurality of stages ST1 to STn. The plurality of stages ST1 to STn correspond to the plurality of gate lines GL1 to GLn.
An output terminal of the present stage is connected to an input terminal of the next stage so that an output signal of the present stage can start operation of the next stage. In addition, the output terminal of each stage is connected to the gate line GL1 to GLn to supply the output signal to the active area AA. Accordingly, the output signal of each stage is supplied to the gate line GL1 to GLn and the next stage. Since the first stage ST1 does not have the previous stage, a start pulse SP is supplied to the first stage ST1 to start operation of the first stage ST1.
First and second clocks having a high level pulse are sequentially supplied to each stage through first and second clock lines CL1 and CL2 outside the gate driver. In addition, the output signals of the shift register are sequentially transmitted from the plurality of stages ST1 to STn to the plurality of gate lines GL1 to GLn.
Recently, it has been required to reduce a bezel area corresponding to a non-display region for a light weight and a thin profile with a slim design of the LCD device. In the GIP type LCD device according to the related art, since the plurality of clock lines are disposed outside the gate driver, there is a limit to obtain a narrow bezel.